MM-6496D


Nine Port 2GB VME64/RACEway/FPDP DRAM Memory Buffer

Features
Capacity: 512MB, 1GB, 2GB and 4GB
Data Transfer Rates:
Both RACEway A's and FPDP1&2: 160 MB/s
VME/VME64: 40/80 MB/s
Nine individual ports
Full chain RACEway DMA Master to FPDP
Direct FPDP to RACEway interface
Description
The MM-6496D is a high-speed, nine port, single slot VME memory buffer that provides up to 2GB of DRAM for FPDP, VME and RACEway systems. Data from two independent FPDP ports and two independent RACEway ports can be directly transmitted or received from any one of four "non-busy" RACEway ports at 160MB/s with a combined data rate of 640MB/s.

The card can be placed at the front or rear end of a real time system to buffer incoming and outgoing data. Individual compute nodes can then receive, process and transfer streaming data at will, which can greatly reduce total compute time and arbitration and overhead for the host. This dramatically improves overall system performance with a single slot solution. The MM-6496D can also provide the additional benefit of being a gateway from FPDP directly into the RACEway or VME.

In addition to having two FPDP ports and a VME port, the card has two RACEway ports on P2 and four RACEway ports on the face of the board. Each of these four ports has an individual memory bank with up to 512MB of DRAM. Each memory bank can be accessed simultaneously, but only through its dedicated RACEway port.

Because the interface is built into an FPGA, there is no hardware integration required to configure the FPDP/RACEway connection. Loading a simple config file is the only software installation required to achieve the fastest possible FPDP to RACEway solution.

The two bi-directional FPDP ports can be configured as either two input ports, two output ports, or one input and one output port. Data can be transmitted or received from each FPDP port simultaneously and the FPDP ports conform to FPDP/TM (Transmit Master), FPDP/RM (Receive Master), FPDP/R (Receive) through jumper selection.

The FPDP ports are controlled by a full chain DMA in the RACEway interface and can be initialized by a host processor on either the VME bus or over the RACEway.

Users who desire access through FPDP and VME but do not require RACEway can still access each of the four memory banks through their dedicated RACEway ports without utilizing MCOS.

Reliability is ensured by burn-in and running memory diagnostics that check operations for 48 hours while temperature-cycling boards from 0° to 60° C.

MM-6496D Product Specification Sheet (PDF file format)

MM-6496D Specifications

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Capacity : 512MB, 1GB and 2GB (future expansion to 4GB)

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Data Transfer Rate :
VME:             40 MB/s
VME64:         80 MB/s
RACEway:    160 MB/s
FPDP:          160 MB/s

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Address : 32-bits for VMEbus and RACEway

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Data In/Data Out :  VMEbus: 8, 16, 32, 64 bits (UAT) multiplexed, RACEway: 32 bits multiplexed,  FPDP: 32 bits

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Sequential Access : Block Transfer (BLT) of 256 bytes (MBLT) 2 KB, and RACEway 2KB

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CSR Selection : CSR selection is jumper selectable on any 256 byte boundary in the VME A16 address space. Module selection is software selectable on 1 MB boundaries (max 256 MB)*

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Interface : Compatible with VMEbus ANSI/VITA 1-1994, RACEway ANSI VITA 5-1994, and FPDP rev. 1.7.

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Memory Selection : CSR is jumper selectable on any 256 byte boundary in VME A16 Address space. The CSR controls the VME "window" onto the RACEway fabric. The "window" is software selectable from one (1) to 256MB.*

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Relative Humidity : Up to 95% without condensation

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Warranty : One year parts and service warranty

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Power Requirements : TBD

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Operating Temperature : 0°C to +55° C

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Storage Temperature : -40°C to +85° C

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Shock : NA

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Vibration : 2Gs

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* : Module selection resolution must be greater than or equal to the window size: e.g. 64MB window requires module selection on 64MB boundary, e.e.g. 0, 64, 128, 192…